*)ĬPUID.EAX = 8000000AH (* INVALID: Returns same information as CPUID.EAX = 0BH. Intel recommends first checking for the existence of CPUID leaf 1FH before using leaf 0BH.ĬPUID.EAX = 80000008H (* Returns linear/physical address size data. CPUID leaf 1FH is a preferred superset to leaf 0BH. On Intel 64 processors, CPUID clears the high 32 bits of the RAX/RBX/RCX/RDX registers in all modes.Ģ. *) 2 CPUID.EAX =1FH (* Returns V2 Extended Topology Enumeration leaf. *) CPUID.EAX = 0BH (* Returns Extended Topology Enumeration leaf. *)ĬPUID.EAX = 0AH (* Returns Architectural Performance Monitoring leaf. For example, using some Intel processors, the following is true:ĬPUID.EAX = 05H (* Returns MONITOR/MWAIT leaf. If a value entered for CPUID.EAX is higher than the maximum input value for basic or extended function for that processor then the data for the highest basic information leaf is returned. Two types of information are returned: basic and extended function information. Table 3-8 shows information returned, depending on the initial value loaded into the EAX register. For example, the following pseudocode loads EAX with 00H and causes CPUID to return a Maximum Return Value and the Vendor Identification String in the appropriate registers: 1 The instruction’s output is dependent on the contents of the EAX register upon execution (in some cases, ECX as well). This instruction operates the same in non-64-bit modes and 64-bit mode.ĬPUID returns processor identification and feature information in the EAX, EBX, ECX, and EDX registers. If a software procedure can set and clear this flag, the processor executing the procedure supports the CPUID instruction. The ID flag (bit 21) in the EFLAGS register indicates support for the CPUID instruction. Returns processor identification and feature information to the EAX, EBX, ECX, and EDX registers, as determined by input entered in EAX (in some cases, ECX as well).
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